VLSI/ASIC Verification Engineer

VLSI/ASIC Verification Engineer

VLSI/ASIC Verification Engineer

  • Work on exciting and advanced SoCs for image processing and computer vision applications.
  • Verification of SoC units, using advanced testbenches and tools
  • Overall verification activities from specification through tapeout and bring-up to production release.

 

Responsibilities

  • Verification environments creation, using SystemVerilog and UVM.
  • Units and chip level test plan creation
  • Implementation of test plans, test writing and debug
  • Functional and code coverage of the design and test plan.
  • Simulation hardware accelerators (Synopsys Zebu) ramp-up and usage

 

Requirements

  • Sc. or higher in Electrical Engineering or computer engineering.
  • At 5 years of experience in Verification.
  • Outstanding technical expertise in the successful completion of multiple VLSI implementation projects.
  • Programming languages: C, Verilog, SystemVerilog, UVM, scripting, are a must.
  • Experience with, and thorough understanding of up-to-date RTL design, simulation and verification methodology, tools, and languages.
  • Knowledge in LPDDR, PCIe, USB, MIPI interfaces is advantage.
  • Strong communication and interpersonal skills to work closely with a variety of individual contributors and managers from different functional groups.

 

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